This lab gives a practical introduction to logic circuit design in Verilog and the use of Xilinx Vivado and Vitis for System-on-Chip (SoC) development and programming. This lab is given completely in English.
- 教師: 教職員 ホルスト シュテファン
コース情報
This lab gives a practical introduction to logic circuit design in Verilog and the use of Xilinx Vivado and Vitis for System-on-Chip (SoC) development and programming. This lab is given completely in English.